Design Aspects of Solar PV Array for PV Fed Inverters

IEEE IAS SBC RIT successfully conducted a two-day session on Design Aspects of Solar PV array for PV Fed Inverters. The session aimed to create awareness and interest in participants on the design aspects of Solar PV arrays. The session was held on 17th and 18th of December from 6 PM to 8 PM. Dr Vincent G, Chapter Advisor IEEE IAS SBC RIT gave the welcome address. Prof. Johnson Mathew ( Associate professor, EEE Dept., RIT, Kottayam) handled the session. The session well-explained the design aspects of the solar PV array and was informative as it imparted both the primary and advanced knowledge of solar PV array.

Venue : ONLINE EVENT

Category: TECHNICAL

December 17, 2020 - December 18, 2020